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Implementation Engineer Salary in Santa Clara, CA

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Cradlepoint, Santa Clara
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We offer a competitive compensation and benefits package to help with your individual needs and goals.Your Pay:The salary range for this position is listed below. The actual salary offered is dependent on various factors including, but not limited to, location, the candidate's combination of job-related knowledge, qualifications, skills, education, training, and experience.$168,700.00 - $313,300.00Your pay also includes the opportunity for an annual bonus and a cash-based long-term incentive. These variable pay opportunities are dependent upon the attainment of goals and objectives as determined by our Senior Leadership team. Certain eligibility and pro-ration rules apply.Your Health:Ericsson Enterprise Wireless Solutions offers excellent, competitive employee benefits, such as: subsidized, nationwide PPO medical benefit options including a low-deductible Point of Service Plan and a qualifying High Deductible Health Plan (HDHP), with a generous company-provided HSA contribution. For California employees, we offer a subsidized HMO option through Kaiser. Ericsson Enterprise Wireless Solutions also offers subsidized dental and vision coverage.Your Financial Security:Ericsson Enterprise Wireless Solutions invests in both your short and long-term financial wellbeing. Our 401(k) plan has a 4% company match and immediate vesting. Employees will also receive company-paid employee basic life and AD&D insurance and company-paid disability benefits.Your Time:Your work-life balance is important to us. Ericsson Enterprise Wireless Solutions provides generous paid time off, including: 15 days of Flexible Time Off (FTO), four paid quarterly well-being days, and 11 paid annual holidays (includes nine company holidays and up to two floating holidays). Please note that an employee's FTO balance and floating holidays may be prorated in the first year, based on start date. We also offer paid maternity-leave benefits and six weeks 100% paid family leave for all employees.Additional Benefits:Ericsson Enterprise Wireless Solutions offers other company-paid benefits such as a comprehensive Employee Assistance Program, Talkspace mobile therapy, and volunteer paid time off.Ericsson Enterprise Wireless Solutions' Diversity, Equity, Inclusion, and Belonging mission is to create an inclusive work environment where all employees' differences are celebrated, their thoughts matter, and everyone feels safe to bring their authentic selves to work. We're proud to be an equal opportunity employer and aim to attract, develop, and engage top talent from a diverse candidate pool. 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US Tech Solutions, Santa Clara
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Field-Programmable Gate Arrays Engineer
LanceSoft Inc, Santa Clara
Note:- Experience must be 7+ Years of Description:Title : Senior FPGA EngineerThe Role : Candidate will be responsible for FPGA implementation and create comprehensive functional test plans for the interface validation of IO controllers. The candidate will execute functional test plans of IP using FPGA hardware & software validation tools, oscilloscopes, & logic analyzers.The Person : Requires good written and oral communication skills with a Demonstrated ability to communicate with a variety of engineering disciplines and management.Responsibilities :- FPGA implementation/timing closure using Xilinx Vivado tools- Creating simple unit level test bench- Pre silicon validation via FPGA for emulating the targeted IP sub-system- Post silicon validation, lab bring up and debug of the targeted IP sub-system- Root cause analysis and resolving issues encountered either in pre-silicon or post silicon targeted IP sub-systemPreferred Experience & Skill Set:• Requires experience and demonstrated technical expertise in the development & execution of platform level functional test plans. Platform level experience with high speed I/O interfaces• Experienced in FPGA development, Synthesis with logical & physical constraints, Timing closure and Place and Route in FPGA• Requires experience and demonstrated technical expertise in the domain of High speed I/O interfaces of computer system.• Requires good written and oral communication skills; Demonstrate the ability to communicate with a variety of engineering disciplines and management.? Familiarity with Xilinx reference platforms such as Zynq reference board etcEDUCATION: B. S. in Electrical Engineering or Computer Engineering
Microprocessor Power Microarchitect
AMD, Santa Clara
WHAT YOU DO AT AMD CHANGES EVERYTHINGWe care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.AMD together we advance_The RoleDo you want to be at the forefront of designing the next Ryzen or Epyc CPU? AMD is seeking an experienced and creative processor designer to analyze and drive power efficient microarchitecture development for the Core pipeline in our the next-generation processor. This is a cross-functional role where you will work closely with the RTL, validation, physical design and architecture teams to evaluate and optimize the power consumption of the design. You should be highly experienced in the microprocessor development process and have a consistent track record of delivering timely, high-quality products. A broad and thorough understanding of low-power design techniques, microprocessor architecture and design is required.Key ResponsibilitiesAnalyze power consumption of new and existing micro architectural features of Next Generation High Performance CPU Cores.Analyze power characteristics of the latest Server/Client CPU workloads and use the data to influence microarchitecture decisions.Collaborate with the RTL team to improve the implementation. Asist them in interpreting power analysis results from tools such as PTPX. Work with the team to gather correct estimates of dynamic power consumption and savings that can be achieved through design optimizations.Collaborate with the Physical Design Team to achieve low power while utilizing the latest cutting-edge fabrication technologies.Collaborate with the Design Verification Team to generate tests that activate the functions under study.Validate power consumption of features in Silicon. Analyze any discrepancies with pre-Silicon projections and provide feedback to the design process.Work with the tools and methodologies teams to define and update tools to aid power analysis.Deliver high quality products on schedule while working with engineers that act as one team.Preferred ExperienceHands on experience with high-speed (GPU/CPU) designsExperience must include a strong level of experience in low power design techniques with industry tools in a CPU, GPU or devices of similar complexity.Register Transfer Level (RTL) coding for high speed designsVerilog/System Verilog, RTL Methodology, Coding practicesLogic designWorking with Performance simulators, workloads and analyzing their resultsCoding and techniques for Low Power Exposure to Verification methodsExperience with Timing closure, Physical Design, Synthesis, or Place and RouteProblem Solving and Debugging SkillsExcellent Communication and Documentation Skills Scripting such as Ruby, Python, Perl, or Shell is a plusAcademic CredentialsMS EE/CE/CS plus years of relevant experienceLOCATION:Santa Clara, CA USAAt AMD, your base pay is one part of your total rewards package. Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD's Employee Stock Purchase Plan. You'll also be eligible for competitive benefits described in more detail here.AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.